• Hardware Capabilities:                                                                                                      
    • 2 transceiver card slots
    • 64 MHz fixed clock rate
  • FPGA Capabilities:
    • 2 RX DDC chains in FPGA
    • 2 TX DUC chains in FPGA (no TX CORDIC -> uses DAC)
    • sc16 sample modes - RX & TX
      • Up to 8 MHz of RF BW with 16-bit samples
    • sc8 sample mode - RX only
      • Up to 16 MHz of RF BW with 8-bit samples

System Environment(Apply U1、RAD、GSM2.5G)

 Testing Commands  (the root user using the following command:)

  • USRP1 test whether the system is connected&See the USRP1 board infos
  • Testing usrp1 of usb data transfer rate
  • View sub-board and the motherboard is connected
  • Reprogram the USRP1 motherboard eeprom
  • Benchmark emission command signal
          #/usr/local/share/gnuradio/examples/digital/benchmark_tx.py -f 900M -T A
  • Usrp_fft received signal command     
          #usrp_fft.py -f 900M -R A

Hardware Setup Notes

         The USRP device can be modified to accept an external clock reference instead of the 64MHz onboard reference.

    • Solder SMA (LTI-SASF54GT) connector to J2001.
    • Move 0 ohm 0603 resistor R2029 to R2030.
    • Move 0.01uF 0603 capacitor C925 to C926.
    • Remove 0.01uF 0603 capacitor C924.

     The new external clock needs to be a square wave between +7dBm and +15dBm.After the hardware modification, the user should burn the setting into the EEPROM.